įigure 1 contains the transfer characteristics of all four MOSFETs: N type enhancement, N type depletion, P type enhancement, and P type depletion. The switching of state for MOSFET can be better understood through the transfer characteristics shown in Figure 1. Since it is pinch-off that produces the switching of state instead of induction of current carriers when a depletion MOSFET is operated in the depletion mode, SPICE must assign the source pin accordingly to simulate the depletion MOSFET as a digital switch. Traditionally, the source pin assignment of depletion MOSFET follows the same rule as enhancement MOSFET according to the induction of current carriers consequently, SPICE can only simulate the depletion MOSFET as a linear device to be operated in the enhancement mode. To overcome this difficulty, the conduction channel of depletion MOSFET is normally built in a tall and thin 3D structure so that it can be surrounded by the gate as much as possible, while offering as many current carriers as possible.Īdditionally, the rule of source-pin assignment to build SPICE models for depletion MOSFETs should also be changed according to the occurrence of pinch-off. A shallow conduction channel, however, limits the amount of current carriers to be implanted and retards the switching for depletion MOSFET. The implementation of a depletion MOSFET is very much the same as an enhancement MOSFET, except the additional requirement to implant a shallow conduction channel below the insulator under the gate so that the conduction channel can be easily pinched off. As the scaling progresses, leakage current through the ever thinner insulator can only get worse, becoming its Achilles’ heel. With the additional substrate terminal to create a reverse-biased PN junction in the substrate to demarcate the conduction channel, the pinch-off of the conduction channel became possible, allowing depletion MOSFETs to be used as digital switches, and CMOS positive logic technology was finally born.įor an enhancement MOSFET, the potential at the gate is always opposite to the potential of the conduction channel when it is conducting currents consequently, the insulator under the gate has to withstand a large potential difference. The bias against depletion MOSFETs was finally discovered and rectified by this author in 2007 with the introduction of the four-terminal depletion MOSFET. When SPICE was developed ten years later, its success only reaffirmed the misconception that the depletion MOSFET was a three-terminal linear device, and not on par with the enhancement MOSFET. Kahng had already moved on and ended his research work with depletion MOSFETs. When Frank Wanlass invented CMOS technology by using a complementary pair of four-terminal enhancement MOSFETs in 1963, Dr. The depletion MOSFET has been used as a three-terminal linear device ever since. Kahng’s depletion MOSFET could only be used as a variable resistor or non-inverting linear buffer. Lacking a reverse-biased PN junction in the substrate to pinch against, it was impossible to shut off the conduction channel of a three-terminal depletion MOSFET from the gate when the gate control voltage was varied between power and ground. Dawon Kahng, who invented the first depletion MOSFET – with only three terminals – in 1959. The seed of this misconception was planted by Dr.
Traditionally, the depletion MOSFET was classified as a linear device because the conduction channel between source and drain could not be pinched off and was thus unqualified for digital switching.
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